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REAP Code: 1025
CAM:1025  RMCAAP:225   RMAT:278

Truechip is visiting RIET, Jaipur on 27th March 2019

Date : 16 Mar 2019 | Category : Event

Truechip  is visiting RIET for recruitment of ECE & EEE & EE students from Btech and Mtech courses.

Below are some important terms/ conditions that you should know regarding the hiring of fresh candidates at Truechip. Pls go through them and if they are acceptable, then please give your acceptance for the written test/interview.

Following are some important terms and conditions for the hiring of fresh candidates:

  1. Only shortlisted candidates (based on CV received) are allowed to appearfor a writtentest.
  2. Writtentest consist of digital electronics, verilog & aptitude.
  3. After writtentest, selected candidates shall be interviewed.
  4. If the candidate is found to be good (based on testandinterview) then there will be an internship period of 6 months. After satisfactory completion of your internship you will be absorbed as an employee in Truechip.

More details about internship:

-During internship, you will be given a stipend of INR12.5K to 16K per month depending on your interview. There may be deductions from this amount related to PF/ ESI and other Government bonds.

More details about your employment after completion of internship:

-After satisfactory completion of your internship you will be absorbed as an employee at Truechip. Your remuneration will be between INR 4.5 Lakhs to INR 5 Lakhs, depending on performance.

Note: The candidate will be offered Internship or Job only based on his performance in written test & Interview.

Find below the JD for your reference.

website:  http://www.truechip.net/

Position / Designation Intern for 4 – 6 Months, Design Engineer after completion of Internship
No of requirements/ vacancies  5-10
Organization Name Truechip Solutions Pvt. Ltd.
Company Profile Semiconductor Company (Core VLSI)
Company’s Website https://www.truechip.net/
Is this an Expansion position or Replacement Expansion
Experience None
CTC Range (per month/ per annum) After confirmation – 4.5-5 LPA
Qualification B Tech(ECE, EEE), M Tech(ECE, EEE)
Location Noida
Gender Preference (if any) No
Core Competencies:

 

 

 

 

 Strong Digital knowledge.

Knowledge of C/C++

Knowledge of HVL (System Verilog, Vera, Specman, E, VMM, OVM, UVM)

Simulation Tools: NCSIM/VCS/ModelSim/Questa

Testbench architecture, coding and good understanding of design issues in RTL
Area of work: Job will require IP/VIP verification for Truechip or IP/SoC verification for the customer.
Added Advantage: Knowledge of RTL coding styles

Low power verification (UPF/CPF) would be an added plus

Experience on System C would be an added plus

Worked on protocols like AMBA AHB/AXI, DDR, MIPI, PCI Express, SATA, USB
Procedure: Written Test followed by Interview

Written test duration will be of 150 minutes.
Working Days 6 days in a week, Mon-Saturday during Internship

5 days in a week, Mon-Friday after confirmation
Work Timings 9:30 am – 6:30 pm